1. Field of the Invention
The present invention relates generally to the field of semiconductor technology. More particularly, the present invention relates to a method for fabricating a power semiconductor device with super junction structure.
2. Description of the Prior Art
As known in the art, super junction power MOSFET devices include alternating p-type and n-type regions below the active regions of the device. The alternating p-type and n-type regions in a super junction power MOSFET device are ideally in charge balance so that those regions deplete one another under a reverse voltage condition, thereby enabling the device to better withstand breakdown.
However, the aforesaid super junction power MOSFET devices have some drawbacks. For example, due to the increased doping concentration of the substrate (or base) in the withstanding termination region, the ability to sustain high voltages is now inadequate even incorporated with the design of floating ring or field plate.
There is a need for improved methods of fabrication that can provide improved performance of the power devices.